{"id":8553,"date":"2025-05-12T22:43:47","date_gmt":"2025-05-12T22:43:47","guid":{"rendered":"https:\/\/www.nsrec.com\/?page_id=8553"},"modified":"2026-06-25T01:30:38","modified_gmt":"2026-06-25T01:30:38","slug":"session-h","status":"publish","type":"page","link":"https:\/\/www.nsrec.com\/session-h\/","title":{"rendered":"Technical Program 2026 &#8211; Session H"},"content":{"rendered":"[vc_row][vc_column][vc_column_text]\n<h2 style=\"text-align:center\"><strong>2026 IEEE NSREC TECHNICAL PROGRAM<\/strong><\/h2>\n<h2 style=\"text-align:center\"><strong>SESSION H SCHEDULE<\/strong><\/h2>\n<h2 style=\"text-align:center\"><strong>PUERTO RICO CONVENTION CENTER, SAN JUAN, PR<\/strong><\/h2>\n<h2 style=\"text-align:center\"><strong>FRIDAY, JULY 24, 2026<\/strong><\/h2>\n[\/vc_column_text][\/vc_column][\/vc_row]\n[vc_row][vc_column width=&#8221;1\/4&#8243;][vc_column_text]<strong>SESSION H<\/strong><br \/>Ballroom A[\/vc_column_text][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text]<strong>HARDENING BY DESIGN<\/strong>[\/vc_column_text][\/vc_column][\/vc_row]\n[vc_row][vc_column width=&#8221;1\/4&#8243;][vc_column_text]10:45 AM[\/vc_column_text][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text]<strong>SESSION INTRODUCTION<\/strong><br \/>Chair: Nathan Nowlin (Sandia National Laboratories)[\/vc_column_text][\/vc_column][\/vc_row]\n[vc_row][vc_column width=&#8221;1\/4&#8243;][vc_column_text]<strong>H-1<\/strong><br \/>10:50 AM[\/vc_column_text][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text]\n<p><strong>A Novel Radiation-Hardened-by-Design FPGA 10T FinFET Configuration Cell Using High- Resistance Feedback<\/strong><\/p>\n<p>M. Reaz<sup>1<\/sup>, N. Rezzak<sup>1<\/sup>, V. Nguyen<sup>1<\/sup>, J. McCollum<sup>1<\/sup>, F. Hawley<sup>1<\/sup>, E. Hamdy<sup>1<\/sup><\/p>\n<p>1. Microchip Technology, USA<\/p>\n<p>A novel RHBD 10T FPGA configuration cell in 12-nm FinFETs using 1.8V devices and a high- resistance RC feedback demonstrates SEU immunity from terrestrial-to-GEO environments, with TCAD identifying gate-oxide charge collection causing exceptionally rare high-LET SEUs.<\/p>\n[\/vc_column_text][\/vc_column][\/vc_row]\n[vc_row][vc_column width=&#8221;1\/4&#8243;][vc_column_text]<strong>H-2<\/strong><br \/>11:05 AM[\/vc_column_text][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text]\n<p><strong>Impact of Topology on TID Response of 4th-Generation SiGe HBT Current Mirrors<\/strong><\/p>\n<p>Z. Brumbach<sup>1<\/sup>, M. Hosseinzadeh<sup>1<\/sup>, Q. Parker<sup>1<\/sup>, D. Sam<sup>1<\/sup>, B. Ringel<sup>1<\/sup>, C. Ellis<sup>1<\/sup>, Y. Mensah<sup>1<\/sup>, P. Harris<sup>2<\/sup>, M. McCurdy<sup>2<\/sup>, R. Reed<sup>2<\/sup>, J. Cressler<sup>1<\/sup><\/p>\n<p>1. Georgia Institute of Technology, USA &nbsp; 2. Vanderbilt University, USA<\/p>\n<p>TID effects on four distinct SiGe HBT current mirror topologies are analyzed. Simple and cascode current mirrors showed mild degradation, while Wilson and balanced-Wilson topologies did not. Circuit simulations were conducted to understand system-level impact.<\/p>\n[\/vc_column_text][\/vc_column][\/vc_row]\n[vc_row][vc_column width=&#8221;1\/4&#8243;][vc_column_text]<strong>H-3<\/strong><br \/>11:20 AM[\/vc_column_text][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text]\n<p><strong>Comparing the SEE Response of Different RF Topological Design Choices Using Active RF Isolators<\/strong><\/p>\n<p>D. Sam<sup>1<\/sup>, J. Caezza<sup>1<\/sup>, J. Teng<sup>2<\/sup>, B. Ringel<sup>1<\/sup>, G. Tzintzarov<sup>2<\/sup>, J. Cressler<sup>1<\/sup><\/p>\n<p>1. Georgia Institute of Technology, USA &nbsp; 2. The Aerospace Corporation, USA<\/p>\n<p>A pulsed-laser study compares the SEE response of two RF isolator topologies. Results demonstrate a reduced transient magnitude and duration in one of the topologies, and circuit simulations are leveraged to pinpoint SEE-resilient design choices.<\/p>\n[\/vc_column_text][\/vc_column][\/vc_row]\n[vc_row][vc_column width=&#8221;1\/4&#8243;][vc_column_text]<strong>H-4<\/strong><br \/>11:35 AM[\/vc_column_text][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text]\n<p><strong>Radiation-Tolerant Analog In-Memory FFT Using Commercial Off-The-Shelf 176-Layer 3D NAND Flash<\/strong><\/p>\n<p>V. Shastry<sup>1<\/sup>, J. Park<sup>1<\/sup>, S. Seo<sup>2<\/sup>, S. Kim<sup>2<\/sup>, S. Yi<sup>1<\/sup><\/p>\n<p>1. Texas A&amp;M University, USA &nbsp; 2. University of Rhode Island, USA<\/p>\n<p>Heavy-ion tolerant analog in-memory FFT computation is evaluated using commercial 176- layer TLC 3D NAND flash operated in SLC mode, where widened threshold voltage separation preserves FFT accuracy under heavy-ion exposure despite radiation-induced threshold voltage variability.<\/p>\n[\/vc_column_text][\/vc_column][\/vc_row]\n[vc_row][vc_column][vc_column_text]\n<h2 style=\"text-align:center\"><strong>POSTER SESSION H<\/strong><\/h2>\n[\/vc_column_text][\/vc_column][\/vc_row]\n[vc_row][vc_column width=&#8221;1\/4&#8243;][vc_column_text]<strong>PH-1<\/strong>[\/vc_column_text][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text]\n<p><strong>Investigating Flux Dependent Fault Masking and Recoverability in a Mixed-Signal SoC via Spatial and Temporal Gating<\/strong><\/p>\n<p>A. Dwadasi<sup>1<\/sup>, R. Rodriguez-Davila<sup>1<\/sup>, M. Pate<sup>2<\/sup>, T. Nikoubin<sup>1<\/sup>, R. Baumann<sup>1<\/sup><\/p>\n<p>1. University of Texas at Dallas, USA &nbsp; 2. Texas Instruments, USA<\/p>\n<p>Flux dependent fault masking in a TI F28377D-SEP microcontroller is investigated using a high-speed shutter and 3-D printed physical masks, showing how temporal and spatial gating can expose hidden unrecoverable faults during accelerated SEE testing.<\/p>\n[\/vc_column_text][\/vc_column][\/vc_row]\n[vc_row][vc_column width=&#8221;1\/4&#8243;][vc_column_text]<strong>PH-2<\/strong>[\/vc_column_text][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text]\n<p><strong>Evaluation of single-event upset effects on VGG neural networks under model lightweighting and algorithm-level hardening<\/strong><\/p>\n<p>N. Yingqiang<sup>1<\/sup>, T. Ming<sup>2<\/sup>, Y. Guofang<sup>1<\/sup>, C. Yaqing<sup>1<\/sup>, C. Jianjun<sup>1<\/sup>, L. Deng<sup>1<\/sup>, Y. Jiaofen<sup>2<\/sup>, L. Bin<sup>1<\/sup><\/p>\n<p>1. National University of Defense Technology, China &nbsp; 2. Hunan University, China<\/p>\n<p>This paper investigates SEU robustness of lightweight VGG networks using ReLU_max and L1-based algorithm-level hardening, evaluated via fault injection, heavy-ion, and laser experiments on sub-20 nm FinFET AI chips, revealing compression-dependent hardening effectiveness.<\/p>\n[\/vc_column_text][\/vc_column][\/vc_row]\n","protected":false},"excerpt":{"rendered":"<p>[vc_row][vc_column][vc_column_text] 2026 IEEE NSREC TECHNICAL PROGRAM SESSION H SCHEDULE PUERTO RICO CONVENTION CENTER, SAN JUAN, PR FRIDAY, JULY 24, 2026 [\/vc_column_text][\/vc_column][\/vc_row] [vc_row][vc_column width=&#8221;1\/4&#8243;][vc_column_text]SESSION HBallroom A[\/vc_column_text][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text]HARDENING BY DESIGN[\/vc_column_text][\/vc_column][\/vc_row] [vc_row][vc_column width=&#8221;1\/4&#8243;][vc_column_text]10:45 AM[\/vc_column_text][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text]SESSION INTRODUCTIONChair: Nathan Nowlin (Sandia National Laboratories)[\/vc_column_text][\/vc_column][\/vc_row] [vc_row][vc_column width=&#8221;1\/4&#8243;][vc_column_text]H-110:50 AM[\/vc_column_text][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text] A Novel Radiation-Hardened-by-Design FPGA 10T FinFET Configuration Cell Using High- Resistance Feedback M.&hellip; <a class=\"more-link\" href=\"https:\/\/www.nsrec.com\/session-h\/\">Continue reading <span class=\"screen-reader-text\">Technical Program 2026 &#8211; Session H<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"inline_featured_image":false,"footnotes":""},"class_list":["post-8553","page","type-page","status-publish","hentry","entry"],"acf":{"page_header":[{"ID":8749,"post_author":"2","post_date":"2025-09-04 20:34:04","post_date_gmt":"2025-09-04 20:34:04","post_content":"[vc_row][vc_column][vc_empty_space height=\"125px\"][\/vc_column][\/vc_row][vc_row][vc_column width=\"1\/2\"][vc_column_text]\r\n<h1>IEEE Nuclear &amp; Space Radiation Effects Conference<\/h1>\r\n<h2>JULY 20th-24th, 2026<\/h2>\r\n<h2>San Juan, Puerto Rico, USA<\/h2>\r\n[\/vc_column_text][vc_column_text]\r\n<div class=\"follow-nsrec-wrap\">Follow NSREC [nsrec_social_icons]<\/div>\r\n[\/vc_column_text][vc_empty_space height=\"6px\"][vc_btn title=\"NSREC Brochure\" style=\"3d\" color=\"warning\" size=\"sm\" i_icon_fontawesome=\"fas fa-external-link-alt\" css_animation=\"fadeIn\" add_icon=\"true\" link=\"url:https%3A%2F%2Fwww.nsrec.com%2Fwp-content%2F%2Fuploads%2F2026%2F07%2F2026_NSRECBrochure_Final_V2e.pdf|target:_blank\"][vc_empty_space height=\"6px\"][vc_btn title=\"Schedule at a Glance\" style=\"3d\" color=\"inverse\" size=\"sm\" i_icon_fontawesome=\"fas fa-external-link-alt\" css_animation=\"fadeIn\" add_icon=\"true\" link=\"url:https%3A%2F%2Fwww.nsrec.com%2Fschedule-at-a-glance%2F|target:_blank\"][\/vc_column][vc_column width=\"1\/4\"][vc_single_image image=\"8767\" style=\"vc_box_rounded\"][vc_empty_space height=\"16px\"][vc_btn title=\"Chair's Invitation\" color=\"inverse\" link=\"url:https%3A%2F%2Fwww.nsrec.com%2Fwp-content%2F%2Fuploads%2F2025%2F11%2FInvitation-Letter.pdf|title:Chair%E2%80%99s%20Invitation|target:_blank\"][vc_separator][\/vc_column][vc_column width=\"1\/4\"][vc_empty_space height=\"290px\"][vc_btn title=\"Short Course Description\" color=\"danger\" link=\"url:https%3A%2F%2Fwww.nsrec.com%2Fwp-content%2F%2Fuploads%2F2026%2F04%2FNSREC-2026ShortCourse-FLYER_v6-Final.pdf|title:Short%20Course%20Description|target:_blank\"][vc_empty_space height=\"16px\"][vc_btn title=\"Supporter and Exhibitor Registration\" color=\"danger\" link=\"url:https%3A%2F%2Fcvent.me%2FvlPo1L|title:Supporter%20Registration|target:_blank\"][vc_empty_space height=\"16px\"][vc_btn title=\"Hotel Registration\" color=\"warning\" css_animation=\"lightSpeedIn\" link=\"url:https%3A%2F%2Fbook.passkey.com%2Fevent%2F51004057%2Fowner%2F5772432%2Fhome%3Futm_campaign%3D299386963c%26mobile%3Dtrue%26dw%3D414|title:Hotel%20Registration%20|target:_blank\"][vc_empty_space height=\"16px\"][vc_btn title=\"Conference Registration\" color=\"warning\" css_animation=\"lightSpeedIn\" link=\"url:https%3A%2F%2Fcvent.me%2FaW0lgE|title:Conference%20Registration|target:_blank\"][\/vc_column][\/vc_row][vc_row][vc_column][vc_empty_space height=\"16px\"][\/vc_column][\/vc_row][vc_row][vc_column][\/vc_column][\/vc_row]","post_title":"Main Header 2026","post_excerpt":"","post_status":"publish","comment_status":"closed","ping_status":"closed","post_password":"","post_name":"main-header-2026","to_ping":"","pinged":"","post_modified":"2026-07-19 12:34:21","post_modified_gmt":"2026-07-19 12:34:21","post_content_filtered":"","post_parent":0,"guid":"https:\/\/www.nsrec.com\/?post_type=headers&#038;p=8749","menu_order":0,"post_type":"headers","post_mime_type":"","comment_count":"0","filter":"raw"}]},"_links":{"self":[{"href":"https:\/\/www.nsrec.com\/wp-json\/wp\/v2\/pages\/8553","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.nsrec.com\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.nsrec.com\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.nsrec.com\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/www.nsrec.com\/wp-json\/wp\/v2\/comments?post=8553"}],"version-history":[{"count":5,"href":"https:\/\/www.nsrec.com\/wp-json\/wp\/v2\/pages\/8553\/revisions"}],"predecessor-version":[{"id":9323,"href":"https:\/\/www.nsrec.com\/wp-json\/wp\/v2\/pages\/8553\/revisions\/9323"}],"wp:attachment":[{"href":"https:\/\/www.nsrec.com\/wp-json\/wp\/v2\/media?parent=8553"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}