Technical Program 2026 – Session G

2026 IEEE NSREC TECHNICAL PROGRAM

SESSION G SCHEDULE

PUERTO RICO CONVENTION CENTER, SAN JUAN, PR

THURSDAY, JULY 23 & FRIDAY, JULY 24, 2026

SESSION G
Ballroom A

HARDNESS ASSURANCE: PIECE PARTS TO SYSTEMS AND TESTING APPROACHES

10:35 AM

SESSION INTRODUCTION
Chair: Almudena Lindoso (University Carlos III Madrid)

G-1
10:40 AM

Pulsed Electrons: A Method for Inducing Ion-like Single-Event Transients and Latchup

G. Tzintzarov1, J. Teng1, A. Kulkarni2, S. Brian2, P. Musumeci2, A. Bushmaker1, S. Milton3, R. Berry4, G. Allen5

1. The Aerospace Corporation, USA   2. University of California, USA   3. TAU Systems, USA   4. RadiaBeam Technologies, USA   5. NASA Jet Propulsion Laboratory, USA

Development of SEE testing using pulsed electrons is discussed. SET correlation in a photodiode is achieved and SEL testing in a COTS part is discussed. Results support the use of such beams for RHA testing.

G-2
10:55 AM

Data Sanitization of Aged SRAM Array using Ionizing Radiation

A. Stephen Vellankanni1, I. Chatterjee2, U. Guin3, B. Ray1

1. Colorado State University, USA   2. Airbus Defence and Space, Germany   3. Auburn University, USA

We demonstrate a TID-based data sanitization technique for aged SRAM, achieving near- complete removal of aging-induced data imprints after 100 krad(Si), and provide a root- cause analysis of the underlying physical mechanisms.

G-3
11:10 AM

Improved Methods for Thermal Neutron SEE Testing and Evaluation

R. Zedric1, N. Dodds1, J. Joffrion1, Y. Xiong1, A. Tonigan1

1. Sandia National Laboratories, USA

Evidence is presented that suggests the international standard for thermal neutron SEE testing contains an error that causes the calculated cross sections to be artificially low. The impacts are quantified, and the formula is corrected. RADIATION EFFECTS DATA WORKSHOP INTRODUCTION Chair: Jennifer Taggart (The Aerospace Corporation) – Exhibitor Drawings – PUERTO RICO RADIATION EFFECTS DATA WORKSHOP

G-4
9:30 AM

Predicting the Location of Heavy-Ion Interactions within Analog Components

J. Carpenter1, T. Peyton1, J. Hales2, T. Crane2, D. McMorrow2, M. McKinney1, J. Lazenby1, D. Loveless1, A. Ildefonso1

1. Indiana University, USA   2. U.S. Naval Research Laboratory, USA

Distance-based hierarchical clustering links heavy-ion SETs to spatially encoded pulsed- laser libraries, enabling the prediction of interaction locations in a COTS operational amplifier. Topside SPA validates clustering confidence, enabling accurate spatial mapping of heavy-ion-sensitive nodes.

G-5
9:45 AM

Estimating SEU Cross-Sections in Single-Port and Two-Port SRAMs Using Data Retention Voltage Measurements

S. Tolson1, X. Zhao1, J. Kronenberg1, N. Pieper1, Y. Xiong1, B. Bhuva1

1. Vanderbilt University, USA

SEU cross-sections of single-port and two-port SRAMs fabricated in a commercial 3-nm bulk FinFET technology node process are estimated using data retention voltage measurements, a simple measure of an SRAM cell’s stability.

G-6
10:00 AM

FlipFlop architecture effect on GEO error rate for FinFET 3-nm node

G. Gasiot1, S. El Hajji1, T. Thery1, V. Correas1, V. Malherbe1, Y. Xiong2, N. Pieper2,

J. Kronenberg2, J-L. Autran3, B. Bhuva2, D. Pandini4, P. Roche1 1. STMicroelectronics, France 2. Vanderbilt University, USA 3. Institut de Physique de Rennes, France 4. STMicroelectronics, Italy Once validated an industrial Monte Carlo modeling tool is used to explore the error rate response of several Flip Flop designs in 3-nm FinFETs to help designers in selecting the best ones for their needs.

POSTER SESSION G

PG-1

Variability Analysis of TID-Induced Failure in a Complex Microcontroller

I. Hudson1, H. Hunnicutt1, D. Loveless1

1. Indiana University, USA

Inter-device variability in TID-induced functional failure was observed across forty-six MSP430FR6989 microcontroller units. A combination of programmable bias and the internal VLO oscillator’s baseline behavior is shown to be predictive of the failure dose. Benchtop Emulation of System-Level Analog Single-Event Transients from Piece-Part PG-2 Data M. McKinney1, C. James1, T. Peyton1, H. Hunnicutt1, D. Loveless1 1. Indiana University, USA A board-level ASET emulation methodology is demonstrated by comparing heavy-ion– induced transients in a linear voltage regulator with emulated responses derived from measured piece-part SETs, enabling system verification with reduced radiation testing.

PG-3

Electron Pulses Generated by Compact Laser-Plasma Accelerators as Surrogates for Heavy Ions in Single Event Effect Testing

M. Hu1, J. Trippe1, D. Ball1, A. Sternberg1, B. Sierawski1, M. Solt2, J. Thieman2, S. Schroeder3, J. Van Tilborg3, J. Matson2, J. Warner2, B. Dorney2, R. Jacob3, C. Berger3, B. Greenwood3, S. Barber3, R. Reed1, D. Fleetwood1, S. Wolin2, K. Nagamatsu2, M. McLain2

1. Vanderbilt University, USA   2. Northrop Grumman, USA   3. Lawrence Berkeley National Laboratory, USA

Laser-plasma accelerated electron bunches are investigated as surrogates for heavy ion testing of single event effects in microelectronics. Experimental data and high-fidelity simulations show that microelectronic responses to electron bunches can mimic heavy ions.

PG-4
10:15 AM

Augmenting Pulsed-Laser Latchup Screening Process with SEL Historical Data Model

J. Warner1, S. Messenger1, B. Song1, J. Rodriguez1

1. Northrop Grumman, USA

Pulsed-laser screening was performed on commercial CMOS devices to estimate the latchup cross-section vs LET curve and historical heavy ion data is used to bound SEL risk. – BREAK TERRACE SESSION H Hardening by Design SESSION INTRODUCTION Chair: Nathan Nowlin (Sandia National Laboratories)